Cyril Bresch

Cyril Bresch

Ph.D.

Marseille, FR

About Me

I’m a proactive problem solver with experience and education in a variety of different fields related to computer system security, compilers, and hardware architecture. I’m a computer security enthusiast, don’t be afraid to reach out.

Experiences

Hardware Security Designer

2020 - Present · SiFive

Working on advanced timing side-channel attacks mitigations on Out-of-Order processors.

Researcher European Consortium SERENE-IoT

2017 - 2020 · LCIS - SERENE-IoT

Worked on software security, implementing compiler defenses (LLVM) and hardware processor extensions (RISC-V) against low-level exploits.

Research Intern

2017 · LCIS

Worked on software security, implementing low-level benchmarks.

Confidential Industrial Project

2016 · SIGVARIS

Worked on Embedded system software, BLE technology, Android application development.

Industrial Computer Technician Intern

2015 · Eli Lilly and Company

Worked on Rockwell Program Logic Controllers, FTView supervision, and VB programming.

Education

Ph.D.

2017 - 2020 · Grenoble Alpes University, University of Arizona

Thesis: Approaches, Strategies, and Implementations of Memory Safety Defenses in Critical and Constrained Embedded Systems

Engineer's Degree

2014 - 2017 · Grenoble Institute of Technology

Thesis: A Red Team Blue Team Approach Towards a Secure Processor Design with Hardware Shadow Stack

Publications

Journal Articles

2020. C. Bresch, D. Hély, R. Lysecky, S. Chollet, I. Parissis. TrustFlow-X: A Practical Framework for Fine-Grained Control-Flow Integrity in Critical Systems. TECS Special issue on Languages Compilers Tools and Theory of Embedded Systems.

2020. C. Bresch, D. Hély, S.Chollet, R Lysecky. SecPump a Connected Open Source Infusion for Security Purposes. IEEE Embedded Systems Letters.

2018. C. Bresch, D. Hély et al. Stack Redundancy to Thwart Return Oriented Programming in Embedded Systems. IEEE Embedded Systems Letters.

International Conferences

2020. C. Bresch, D. Hély, R. Lysecky. BackFlow: Backward Edge Control-Flow Integrity Enforcement for Low-End ARM Microcontrollers. Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020.

2019. C. Bresch, D. Hély, S. Chollet, and I. Parissis. TrustFlow: A Trusted Memory Support for Data Flow Integrity. IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

2018. C. Bresch, S. Chollet, and D. Hély. Towards an inherently secure run-time environment for medical devices. IEEE International Congress on Internet of Things, ICIOT 2018.

2017. C. Bresch, A. Michelet, L. Amato, T. Meyer, and D. Hély. A red team blue team approach towards a secure processor design with hardware shadow stack. 2nd International Verification and Security Workshop IVSW.

Workshops

2020. Z. Kazemi, C. Bresch, M Fazeli, D. Hély. A Systematic Approach for Hardware Security Assessment of Secured IoT Applications. TRUDEVICE Workshop at Design, Automation and Test in Europe Conference and Exhibition, DATE 2020.

2019. C. Bresch, D. Hély, R. Lysecky. Control-Flow Hijacking Attacks on SecPump, a Cyber-Physical System. University Booth Demonstration at Design, Automation and Test in Europe Conference and Exhibition, DATE 2020.

2019. C. Bresch. Control-Flow Hijacking Attacks on SecPump, a Cyber-Physical System. The International Cybersecurity Forum, Lille.

2018. C. Bresch. Return-Oriented Programming Attacks on Embedded Linux. European Forum for Electronic and Components and Systems, Bruxelles.

Honors

Laureate of the Out-of-lab Entrepreneur Challenge

May 2020 · Linksium - Grenoble

I presented my thesis project and the outcomes regarding its integration in the industry. I won a market study and an accompaniment to valorize my thesis results.

Cyber-Physical System Hack at the International Cybersecurity Forum

January 2019 · FIC - Lille

Presentation to the director of ANSII of a cyber-attack on a wireless infusion pump.

1st Place Mentor at CSAW ESC

November 2017 · CSAW - Valence (FR)

Led team of four students at mitigating cyberattacks on Programmable Logic Controllers.

2nd Place at CSAW ESC

November 2016 · Tandon University - New York

We’ve demonstrated a PoC of a hardware shadow stack to mitigate ROP attacks on openRISC architecture. See my GitHub

Certifications

Cryptography I

Stanford Online

Hobbies

  • Reading (I read a lot of books, about science, biographies, and economics 😄)
  • Hiking and swimming
  • Entrepreneurship